EPPL – ENHANCED POWER PILOT LINE
The ENIAC JU project EPPL shall demonstrate the market readiness of the second generation power semiconductor devices fabricated in European leading 300mm pilot lines enabling manufacturing excellence and cost competitiveness to serve challenging applications.
WORK AND CONSORTIUM
Work to be performed includes developing next generation power semiconductors based on 300mm wafers, setting up the required technologies as pilot line manufacturing, and demonstrating the thus achieved reliable and advantageous solutions for a wide range of ENIAC grand challenge application fields. The project aims at achieving the realization of demonstrators in a pilot line, and demonstrating production readiness in the large-scale production environments of strategically selected products and technologies. The demonstrators will be verified in fully functional, energy efficient power applications.
The main goal is to extend the leading position of power semiconductors “Made in Europe”. The expected improvement addresses technical challenges as well as commercial competitiveness, both in technology research, semiconductor manufacturing, chip/package interconnection technologies and energy efficient applications. Enabling this, a range of unique manufacturing processes and technologies are expected, as are a multitude of product innovations of direct impact onto everyday high-tech life, e.g. eco-friendly generation of solar power, extended ranges in automotive mobility, lower power consumption in illumination or smarter and more powerful medical-diagnostic appliances.
- Project: EPPL - Enhanced Power Pilot Line
- Programme: ENIAC Joint Undertaking
- Project Leader: Infineon Technologies Austria AG
- Duration: 3 years (04/2013 - 03/2016)
- Consortium: 31 Partners from 6 nations
- Project Volume: 74,8 mio Euro (funding 15%)
- Website: www.eppl-project.eu
EPPL is co-funded by grants from Austria, Germany, Italy, the Netherlands, France, Portugal and the ENIAC Joint Undertaking (ENIAC JU).